Assignment 5
Due: before class on Wednesday, November 17, 2021
Overview
For this assignment, you will build a 4-bit ALU in Logisim that implements standard arithmetic and logical operations: bitwise AND, OR, NAND, and NOR; and addition and subtraction.
Similar to the previous assignment, your grade will depend on the correctness of your circuits. I will use a large test suite to validate your circuits’ outputs. Keep in mind that the Gradescope autograder is not very robust, so please make sure you:
- Are using the latest version of Logisim Evolution (version 3.3.1),
- Do not rename the starter files,
- Do not rearrange the pins so that the circuit has different geometry than the tests expect.
Part A: 1-bit ALU
Start by downloading the 1_bit_alu.circ. For this part of the assignment, you must finish implementing a 1-bit ALU, as described in class and in the readings. You will find that the starter file has the following inputs and outputs:
Inputs
a
andb
: The values that should be ANDed, ORed, added, etc.operation
: The ALU should perform AND whenoperation
is00
, OR whenoperation
is01
, addition whenoperation
is10
, and nothing (for now) whenoperation
is11
.a_invert
andb_invert
: These should inverta
andb
, respectively, before they are connected to any of the ALU’s operations. Setting botha_invert
andb_invert
allows you to compute NOR and NAND (using AND and OR operations) without any additional gates. Setting justb_invert
(andc_in
) negates theb
input, which allows you to perform subtraction.c_in
: This input is the carry input from a chained adder, or thec_in
input you can set when negating a number. Recall that in two’s-complement $-b = \overline{b}+1$. Setting this input to1
lets you easily add one to the invertedb
value (selected withb_invert
).
Outputs
result
: The result of the selected operation after all inversions, carry logic, etc.c_out
: The carry output ofa
andb
. Note that this should be1
ifa
plusb
plusc_in
is two or larger, even whenoperation
is set to something other than addition or subtraction.
NOTE:
You do not need to build your own adder or multiplexors. You should use Logisim’s built-in multiplexors, adders, and any logic gates you may need. When using Logisim’s built-in multiplexor, set its option “Include Enable?” to “No”. (Such an input pin allows many such multiplexors to share the same output line, because when Enable
is deasserted, the output will have no signal.)
Test your circuit so that the input/output behavior is as required, then upload your circuit to Gradescope. Within a few minutes, you will receive the autograder results from the exhaustive tests. You may submit as many times as you like before the deadline.
Part B: 4-bit ALU
Start by downloading the 4_bit_alu.circ and copying your solution from Part A into the alu_1_bit
subcircuit. Then in the main circuit, chain four of your 1-bit ALUs together to build a 4-bit ALU. The inputs and outputs provided in the circuit are the same, except a
, b
, and result
are now four bits, and have been connected to splitters to break each bit off into a separate line. The pin numbered “0” is the rightmost digit (the LSB, or $2^0$ place) of the binary number in the pin’s value.
Test your circuit so that the input/output behavior is as required, then upload your circuit to Gradescope.
ACKNOWLEDGEMENT: This assignment was based on one written by Marge Coahran, Charlie Curtsinger, Janet Davis, and Jerod Weinman and used with permission.