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# The Datapath

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CS 130 // 2021-11-29

## The Datapath
- What is a "datapath" and what does it consist of?
    + 
 It is the main component of the CPU that executes instructions
    + 
 Fetches instructions and data from memory, performs arithmetic, etc.
    + 
 Consists of ALUs, a register file, RAM, and various supplementary logic gates

## Instruction Execution
1. Uses the PC to fetch the next instruction to be executed from memory
2. 
 Identifies instruction type and registers involved and fetches their contents from the register file
3. 
 Depending on the instruction:
    - 
 Uses the ALU to do appropriate arithmetic
    - 
 Read/write RAM for load/store
    - 
 Update PC to PC + 4 or the jump target address

## K&S Datapath Demo

- [K&S Datapath Simulator](javascript:window.open('http://users.dickinson.edu/%7Ebraught/kands/KandS2/datapath.html','KSA','width=525,height=650');)
- 
 [K&S Simulator with Main Memory](javascript:window.open('http://users.dickinson.edu/%7Ebraught/kands/KandS2/dpandmem.html','KSB','width=800,height=650');)
- 
 [K&S Simulator with Microprogramming](javascript:window.open('http://users.dickinson.edu/%7Ebraught/kands/KandS2/micromachine.html','KSC','width=850,height=650');)
- 
 [K&S Computer Simulator](javascript:window.open('http://users.dickinson.edu/%7Ebraught/kands/KandS2/machine.html','KSC','width=850,height=650');)

# Building a Datapath

## Instruction Fetch

![Instruction Fetch](/teaching/2021f/cs130/assets/images/COD/instruction_fetch.png)

## R-Format Instructions

- Read two register operands, perform ALU operation, write result to target register

![R-Format Instructions](/teaching/2021f/cs130/assets/images/COD/r_format_instructions.png)

## Load/Store Instructions

- Read register operands, calculate address, read/write to memory

![Load-Store Instructions](/teaching/2021f/cs130/assets/images/COD/load_store_instructions.png)

## Branch Instructions

- Read register operands, compare operands, calculate target address

![Branch Instructions](/teaching/2021f/cs130/assets/images/COD/branch_instructions.png)

## The Full Datapath

# Control

## ALU Control
- This datapath has an ALU opcode of four bits
- We will be using the following operations:

---

<table style="font-size: 60%">
  <tbody>
    <tr> <th>ALU Control</th> <th>Function</th></tr>
    <tr> <td>0000</td> <td>AND</td> </tr>
    <tr> <td>0001</td> <td>OR</td> </tr>
    <tr> <td>0010</td> <td>add</td></tr>
    <tr> <td>0110</td> <td>subtract</td> </tr>
    <tr> <td>0111</td> <td>set-on-less-than</td></tr>
    <tr> <td>1100</td> <td>NOR</td></tr>
  </tbody>
</table>

## ALU Control
- When executing a load word or store word, what ALU function will be used?
    + 
 It will use `add` to compute the memory address
- 
 When executing a branch instruction, what ALU function will be used?
    + 
 It will use `subtract` to compare the values of the two registers (it has a `Zero` output)
- 
 When executing an R-type instruction, the ALU function depends on the 6-bits of the `funct` code

## ALU Control

![ALU Control Table](/teaching/2021f/cs130/assets/images/COD/alu_control_table.png)

## ALU Control

![ALU Control By Instruction](/teaching/2021f/cs130/assets/images/COD/alu_control_by_instruction.png)

## Datapath with Control

## Control Truth Table

- The control unit can be implemented with a simple combinational logic unit from its truth table:

![Control Truth Table](/teaching/2021f/cs130/assets/images/COD/control_truth_table.png)

# Performance Issues

## Performance Issues
- Longest delay determines clock period
    + 
 Which instruction takes the most time?
    + 
 The **load** instruction---5 steps
- 
 Not feasible to vary period for different instructions
- 
 Violates design principle
    + Making the common case fast
- 
 We will improve performance by **pipelining**